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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
EE 2016-01-28
16:50
Fukuoka KURUME HOTEL ESPRIT A Digital PFM Controlled 1MHz Switching Frequency Isolated DC-DC Converter with Nano-Second Delay
Hirotaka Nonaka, Akinori Hariya, Shogo Hirota, Hayato Yamaoka, Yoichi Ishizuka (Nagasaki Univ.) EE2015-14
In this paper, a digital PFM controller with nsec order delay time for 1MHz switching frequency isolated DC-DC converter... [more] EE2015-14
pp.31-36
EE 2016-01-29
09:20
Fukuoka KURUME HOTEL ESPRIT nsec. Level response digital controller with GaN-HEMT POL
Shogo Hirota, Akinori Hariya, Hirotaka Nonaka, Yoichi Ishizuka (Nagasaki Univ.) EE2015-16
 [more] EE2015-16
pp.43-47
EE, CPM 2015-02-27
11:15
Tokyo NTT Musashino R&D Center A Digital PFM Controller with Suppressed Time-Delay within 1μs
Hirotaka Nonaka, Akinori Hariya, Naoto Miyaki, Shogo Hirota, Yoichi Ishizuka (Nagasaki Univ.) EE2014-44 CPM2014-158
In this paper, a digital pulse width modulation (PFM) controller for the non-isolated DC-DC Converter has been proposed.... [more] EE2014-44 CPM2014-158
pp.19-24
EE, WPT
(Joint)
2014-11-18
13:50
Kyoto Doshisha University An Application of a Proposed Digital Controller with Nano-second Delay for DC-DC Converters
Naoto Miyaki, Akinori Hariya, Hirotaka Nonaka, Yoichi Ishizuka (Nagasaki Univ.) EE2014-23
In recent years, switch mode power supplies are desired high power density. The key factors of the power density are hig... [more] EE2014-23
pp.25-30
EE 2014-01-24
09:00
Miyazaki MIYAZAKI KANKO HOTEL Frequency Response Analysis of Sub-us Response Digital Controller for POL
Kenji Mii, Hirotaka Nonaka (Nagasaki Univ.), Daisuke Kanemoto (Yamanashi Univ.), Yoichi Ishizuka (Nagasaki Univ.) EE2013-39
In this paper, the proposed hardware logic type digital controller for on-board SMPS which has a very small time-delay i... [more] EE2013-39
pp.49-54
EE 2014-01-24
09:25
Miyazaki MIYAZAKI KANKO HOTEL An effect of internal A/D converter's resolution and latency for DC-DC converter
Daisuke Kanemoto (Univ. of Yamanashi), Kenji Mii, Hirotaka Nonaka, Yoichi Ishizuka (Nagasaki Univ.), Makoto Ohki (Univ. of Yamanashi) EE2013-40
A DC-DC converter utilizing digital feedback path uses internal Analog-to-Digital Converter (ADC)
in order to convert p... [more]
EE2013-40
pp.55-60
 Results 1 - 6 of 6  /   
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