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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, SDM | 2010-08-27 09:50 |
Hokkaido | Sapporo Center for Gender Equality | A 60% Higher Write Speed, 4.2Gbps, 24-Channel 3D-Solid State Drive (SSD) with NAND Flash Channel Number Detector and Intelligent Program-Voltage Booster Teruyoshi Hatanaka, Koichi Ishida, Tadashi Yasufuku (Univ. of Tokyo), Shinji Miyamoto, Hiroto Nakai (Toshiba), Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi (Univ. of Tokyo)  SDM2010-140 ICD2010-55 |
[more] | SDM2010-140 ICD2010-55 pp.89-94 |
| ICD, ITE-IST | 2010-07-23 16:00 |
Osaka | Josho Gakuen Osaka Center | User Customizable Logic Paper with 2V Organic CMOS and Ink-Jet Printed Interconnects Koichi Ishida, Naoki Masunaga, Ryo Takahashi, Tsuyoshi Sekitani (Univ. of Tokyo), Shigeki Shino (Mitsubishi Paper Mills Ltd.), Ute Zschieschang, Hagen Klauk (Max Planck Institute), Makoto Takamiya, Takao Someya, Takayasu Sakurai (Univ. of Tokyo) ICD2010-35 |
We propose a User Customizable Logic Paper (UCLP), which is suitable for the prototyping of large-area electronics with ... [more] | ICD2010-35 pp.115-119 |
| ICD | 2009-12-15 16:10 |
Shizuoka | Shizuoka University (Hamamatsu) | Inductor Design of 20-V Boost Converter for Low Power 3D Solid State Drive Tadashi Yasufuku, Koichi Ishida (Univ. of Tokyo.), Shinji Miyamoto, Hiroto Nakai (Toshiba), Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi (Univ. of Tokyo.) ICD2009-103 |
An inductor design for a 3D Solid State Drive (3D-SSD) with a boost converter are presented in this paper. The spiral in... [more] | ICD2009-103 pp.151-156 |
| ICD, ITE-IST | 2009-10-01 09:10 |
Tokyo | CIC Tokyo (Tamachi) | Feasibility Study on EMI Measurement "furoshiki" using 2V Organic CMOS and Silicon CMOS Koichi Ishida, Naoki Masunaga, Zhiwei Zhou, Tadashi Yasufuku, Tsuyoshi Sekitani (Univ. of Tokyo), Ute Zschieschang, Hagen Klauk (Max Planck Institute), Makoto Takamiya, Takao Someya, Takayasu Sakurai (Univ. of Tokyo) ICD2009-33 |
[more] | ICD2009-33 pp.1-6 |
| ICD, SDM | 2009-07-16 10:25 |
Tokyo | Tokyo Institute of Technology | A 100Mbps, 1.28mW Impulse Radio UWB Receiver with Charge-Domain Sampling Correlator in 0.18um CMOS Lechang Liu, Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo) SDM2009-98 ICD2009-14 |
A low power impulse radio ultra-wideband (UWB) receiver for DC-960MHz band is proposed in this paper. The proposed charg... [more] | SDM2009-98 ICD2009-14 pp.7-11 |
| ICD | 2009-04-14 14:35 |
Miyagi | Daikanso (Matsushima, Miyagi) | [Invited Talk]
A 1.8V 30nJ Adaptive Program-Voltage (20V) Generator for 3D-Integrated NAND Flash SSD Tadashi Yasufuku, Koichi Ishida (Tokyo Univ.), Shinji Miyamoto, Hiroto Nakai (Toshiba), Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi (Tokyo Univ.) ICD2009-10 |
A boost-converter-based adaptive voltage generator for 3D-integrated SSD is proposed. Adaptive frequency and duty cycle ... [more] | ICD2009-10 pp.47-52 |
| ICD, ITE-IST | 2008-10-24 11:15 |
Hokkaido | Hokkaido University | A 100Mbps, 0.41mV Impulse UWB Transceiver Based on Leading Edge Detection Technique Lechang Liu, Yoshio Miyamoto, Zhiwei Zhou, Kosuke Sakaida, Jisun Ryu, Koichi Ishida, Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo) ICD2008-84 |
A novel low power impulse Ultra-wideband (UWB) transceiver based on leading edge detection technique is developed. It fe... [more] | ICD2008-84 pp.149-154 |
| CPM, ICD | 2008-01-17 11:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg | Design of an On-Chip Noise Canceller with High Voltage Supply Lines for Nanosecond-Range Power Supply Noise Yasumi Nakamura, Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo) CPM2007-132 ICD2007-143 |
An on-chip noise canceller with high voltage supply lines for the nanosecond-range power supply noise is proposed. The ... [more] | CPM2007-132 ICD2007-143 pp.23-27 |
| ICD, SDM | 2007-08-24 09:20 |
Hokkaido | Kitami Institute of Technology | An On-Chip Noise Canceller with High Voltage Supply Lines for Nanosecond-Range Power Supply Noise Yasumi Nakamura, Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo) SDM2007-157 ICD2007-85 |
An on-chip noise canceller with high voltage supply lines for the nanosecond-range power supply noise is proposed. The ... [more] | SDM2007-157 ICD2007-85 pp.91-94 |
| ICD | 2007-04-13 10:30 |
Oita | A 0.14pJ/b Inductive-Coupling Transceiver Noriyuki Miura, Hiroki Ishikuro (Keio Univ.), Takayasu Sakurai (Univ. of Tokyo), Tadahiro Kuroda (Keio Univ.) ICD2007-12 |
A 0.14pJ/b inter-chip inductive-coupling data transceiver is developed. By using a pulse-shaping circuit, the transmitte... [more] | ICD2007-12 pp.65-69 |
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| OME | 2006-12-18 14:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg | AC characteristics of organic CMOS logic circuits Kazuki Hizu, Tsuyoshi Sekitani (Univ. Tokyo), Joe Otsuki (Nihon Univ.), Makoto Takamiya, Takayasu Sakurai, Takao Someya (Univ. Tokyo) |
[more] | OME2006-115 pp.37-41 |
| ICD, SDM | 2006-08-17 10:55 |
Hokkaido | Hokkaido University | A 1-ps resolution on-chip sampling oscilloscope with 64:1 tunable sampling range based on ramp waveform division scheme Kenichi Inagaki (Univ. of Tokyo), Danardono Dwi Antono (SONY), Makoto Takamiya (Univ. of Tokyo), Shigetaka Kumashiro (NEC Electronics), Takayasu Sakurai (Univ. of Tokyo) |
An on-chip sampling oscilloscope with 1ps timing resolution is realized in 90nm CMOS process based on a proposed ramp wa... [more] | SDM2006-129 ICD2006-83 pp.25-30 |
| ICD, SDM | 2006-08-17 14:45 |
Hokkaido | Hokkaido University | A 1-V 299uW Flashing UWB Transceiver Based on Double Thresholding Scheme Makoto Takamiya, Atit Tamtrakarn (Univ. of Tokyo), Hiroki Ishikuro (Keio Univ.), Koichi Ishida (Tokyo Tech), Takayasu Sakurai (Univ. of Tokyo) |
This paper presents an Ultra-Wide-Band transceiver based on a newly proposed double thresholding scheme. The scheme does... [more] | SDM2006-135 ICD2006-89 pp.57-61 |
| ICD, SDM | 2006-08-17 15:10 |
Hokkaido | Hokkaido University | Daisy Chain for Power Reduction in Inductive-Coupling CMOS Link Mari Inoue, Noriyuki Miura, Kiichi Niitsu (Keio Univ.), Yoshihiro Nakagawa, Masamoto Tago, Muneo Fukaishi (NEC Corp.), Takayasu Sakurai (Univ. of Tokyo), Tadahiro Kuroda (Keio Univ.) |
[more] | SDM2006-136 ICD2006-90 pp.63-68 |
| OME | 2006-07-27 14:20 |
Kanagawa | Low voltage operation of organic CMOS inverter circuit with double-gate structure Kazuki Hizu, Tsuyoshi Sekitani (Univ. Tokyo), Youko Shimada, Joe Otsuki (Nihon Univ.), Makoto Takamiya, Takayasu Sakurai, Takao Someya (Univ. Tokyo) |
We reported that threshold voltage of organic transistors can be controlled with double-gate structures. By applying tha... [more] | OME2006-56 pp.33-35 |
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| ICD | 2006-05-26 15:45 |
Hyogo | Kobe University | A 1Tb/s 3W Inductive-Coupling Transceiver for Inter-Chip Clock and Data Link Noriyuki Miura, Daisuke Mizoguchi, Mari Inoue, Kiichi Niitsu (Keio Univ.), Yoshihiro Nakagawa, Masamoto Tago, Muneo Fukaishi (NEC), Takayasu Sakurai (Univ. of Tokyo), Tadahiro Kuroda (Keio Univ.) |
A 1Tb/s 3W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1GHz and data rate o... [more] | ICD2006-38 pp.95-100 |
| ICD, ITE-CE | 2006-01-26 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | High-Voltage Torelant Opamp Design Targeting for Future Scaled Transistors Koichi Ishida, Atit Tamtrakarn (Univ. of Tokyo), Hiroki Ishikuro (Toshiba Corp.), Takayasu Sakurai (Univ. of Tokyo) |
An outside-rail output opamp targeting for future scaled MOSFETs is designed and the 3-V-output operation is successfull... [more] | ICD2005-205 pp.1-6 |
| ICD, ITE-CE | 2006-01-26 11:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | VDD-Hopping Accelerator for On-Chip Power Supplies Achieving Nano-Second Order Transient Time Kohei Onizuka, Takayasu Sakurai (Tokyo Univ.) |
A VDD-hopping accelerator for on-chip power supply circuits is proposed and the effectiveness of the accelerator circuit... [more] | ICD2005-207 pp.13-17 |
| ICD, ITE-CE | 2006-01-26 11:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Low Leakage-power FPGA Design using Zigzag Power-gating, Dual-VTH/VDD and Micro-VDD-hopping Canh Q. Tran (Tokyo University), Hiroshi Kawaguchi (Kobe University), Takayasu Sakurai (Tokyo University) |
[more] | ICD2005-208 pp.19-24 |
| ICD | 2005-12-16 10:15 |
Kochi | Low-Power High-Speed Reduced-Clock-Swing Flip-Flops Based on Contention Reduction Techniques Muhammad Yazid, Hiroshi Kawaguchi, Takayasu Sakurai (Tokyo Univ.) |
A new flip-flop circuit is proposed for use in the reduced swing clock environment. Simulations were done and it was fou... [more] | ICD2005-195 pp.19-24 |
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