Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF |
2022-09-07 16:00 |
Aichi |
emCAMPUS STUDIO (Primary: On-site, Secondary: Online) |
[Short Paper]
Zuquan Qin, Weu Kaijie, Hideharu Amano (Keio Univ.), Kazuhiro Nakadai (TIT) RECONF2022-32 |
(To be available after the conference date) [more] |
RECONF2022-32 pp.21-22 |
CPSY, DC, IPSJ-ARC [detail] |
2022-07-28 13:30 |
Yamaguchi |
Kaikyo Messe Shimonoseki (Primary: On-site, Secondary: Online) |
Preliminary evaluation of "SLMLET" chip with RISC-V MP and SLM reconfigurable logic Yosuke Yanai (Keio Univ.), Takuya Kojima (Tokyo Univ.), Hayate Okuhara (NUS.), Hideharu Amano (Keio Univ.), Masahiro Iida (Kumamoto Univ.) CPSY2022-8 DC2022-8 |
In recent years, processing power in IoT edge devices has been further improved. Therefore, a solution called a mixed FP... [more] |
CPSY2022-8 DC2022-8 pp.41-46 |
CPSY, DC, IPSJ-ARC [detail] |
2022-07-28 14:00 |
Yamaguchi |
Kaikyo Messe Shimonoseki (Primary: On-site, Secondary: Online) |
Takumi Inage, Kensuke Iizuka, Hideharu Amano (Keio Univ.) CPSY2022-9 DC2022-9 |
(To be available after the conference date) [more] |
CPSY2022-9 DC2022-9 pp.47-52 |
CPSY, DC, IPSJ-ARC [detail] |
2022-07-29 09:45 |
Yamaguchi |
Kaikyo Messe Shimonoseki (Primary: On-site, Secondary: Online) |
CPSY2022-13 DC2022-13 |
(To be available after the conference date) [more] |
CPSY2022-13 DC2022-13 pp.71-76 |
CPSY, DC, IPSJ-ARC [detail] |
2022-07-29 11:00 |
Yamaguchi |
Kaikyo Messe Shimonoseki (Primary: On-site, Secondary: Online) |
Efficient placement of coherence directories in memory networks Yuki Kameyama, Naoya Niwa, Daichi Fujiki (Keio Univ.), Michihiro Koibuchi (NII), Hidearu Amano (Keio Univ.) CPSY2022-14 DC2022-14 |
Memory Cube (MC) is a memory module that manages three-dimensional stacking of DRAM chips with a logic layer on the bott... [more] |
CPSY2022-14 DC2022-14 pp.77-82 |
RECONF |
2022-06-08 11:35 |
Ibaraki |
CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
Introduction of Power Monitoring Tool for FPGA Clusters and Power Analysis of FPGA Clusters Kensuke Iizuka, Haruna Takagi, Aika Kamei, Kazuei Hironaka, Hideharu Amano (Keio Univ) RECONF2022-18 |
Low power consumption is a significant advantage of FPGA clusters.
This study reports the detailed power consumption an... [more] |
RECONF2022-18 pp.80-85 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2022-03-10 13:50 |
Online |
Online |
Implementation of an Application Mapping Tool for a Circuit-Switched Multi-FPGA System Kohei Ito (Keio Univ.), Ryota Yasudo (Kyoto Univ.), Hideharu Amano (Keio Univ.) CPSY2021-48 DC2021-82 |
(To be available after the conference date) [more] |
CPSY2021-48 DC2021-82 pp.20-25 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2022-03-10 14:30 |
Online |
Online |
Compression of configuration data in Scalable Logic Module Souhei Takagi, Naoya Niwa, Yoshiya Shikama, Yosuke Yanai, Hideharu Amano (Keio Univ), Yuya Nakasato, Daiki Amagasaki, Masahiro Iida (Kumamoto Univ) CPSY2021-49 DC2021-83 |
(To be available after the conference date) [more] |
CPSY2021-49 DC2021-83 pp.26-31 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2022-03-11 14:50 |
Online |
Online |
A Study on an Acceleration of Graph-Based SLAM with FPGA Hajime Takishita, Yuan He, Masaaki Kondo, Hideharu Amano (Keio Univ.n) CPSY2021-62 DC2021-96 |
(To be available after the conference date) [more] |
CPSY2021-62 DC2021-96 pp.103-108 |
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] |
2022-01-25 10:45 |
Online |
Online |
An Implementation of a Real-time Stereo Matching System on FPGA Kaijie Wei (Keio Univ.), Yuki Kuno (Marelli Corp.), Masatoshi Arai (Saitama Univ.), Hideharu Amano (Keio Univ.) VLD2021-65 CPSY2021-34 RECONF2021-73 |
To make full use of stereo data in autonomous driving system, the techniques to generate depth-map in real-time are nece... [more] |
VLD2021-65 CPSY2021-34 RECONF2021-73 pp.90-95 |
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] |
2022-01-25 11:50 |
Online |
Online |
VLD2021-67 CPSY2021-36 RECONF2021-75 |
(To be available after the conference date) [more] |
VLD2021-67 CPSY2021-36 RECONF2021-75 pp.102-107 |
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] |
2022-01-25 17:05 |
Online |
Online |
Hard-to-Detect Hardware Trojan Attack Exploiting Coherence Control Mechanisms Yoshiya Shikama (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) VLD2021-75 CPSY2021-44 RECONF2021-83 |
(To be available after the conference date) [more] |
VLD2021-75 CPSY2021-44 RECONF2021-83 pp.148-153 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 10:35 |
Online |
Online |
Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops Aika Kamei, Takuya Kojima, Hideharu Amano (Keio Univ.), Daiki Yokoyama, Hisato Miyauchi, Kimiyoshi Usami (SIT), Keizo Hiraga, Kenta Suzuki (SSS) VLD2021-20 ICD2021-30 DC2021-26 RECONF2021-28 |
IoT and edge-computing have been attracting much attention and demands for power efficiency as well as high performance ... [more] |
VLD2021-20 ICD2021-30 DC2021-26 RECONF2021-28 pp.19-24 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-02 09:20 |
Online |
Online |
The Implementation of a Hybrid Router with Dynamic Communication Priority Changes on a Multi-FPGA System Tomoki Shimizu, Kohei Ito, Kensuke Iizuka, Kazuei Hironaka, Hideharu Amano (Keio Univ.) VLD2021-36 ICD2021-46 DC2021-42 RECONF2021-44 |
We are currently developing a multi-FPGA system, Flow-in-Cloud (FiC) system. FiC directly interconnects multiple middle-... [more] |
VLD2021-36 ICD2021-46 DC2021-42 RECONF2021-44 pp.111-116 |
DC, CPSY, IPSJ-ARC [detail] |
2021-10-11 13:00 |
Online |
Online |
CPSY2021-13 DC2021-13 |
(To be available after the conference date) [more] |
CPSY2021-13 DC2021-13 pp.7-12 |
CPSY, DC, IPSJ-ARC [detail] |
2021-07-20 15:15 |
Online |
Online |
CPSY2021-3 DC2021-3 |
[more] |
CPSY2021-3 DC2021-3 pp.13-18 |
CPSY, DC, IPSJ-ARC [detail] |
2021-07-20 16:15 |
Online |
Online |
CPSY2021-5 DC2021-5 |
(To be available after the conference date) [more] |
CPSY2021-5 DC2021-5 pp.25-30 |
RECONF |
2021-06-09 15:00 |
Online |
Online |
An implementation of a satisfiability problem solver : Amoeba SAT on M-KUBOS board Yan Ying Jie, Masashi Aono, Hideharu Amano (Keio Univ.), Kaori Ohkoda, Shingo Fukuda, Saito Kenta (Amoeba Energy), Seiya Kasai (Hokkaido Univ.) RECONF2021-13 |
(To be available after the conference date) [more] |
RECONF2021-13 pp.68-73 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2021-03-26 09:20 |
Online |
Online |
Optimal placement of coherence directories using memory networks Yuki Kameyama, Yoshiya Shikama, Naoya Niwa (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2020-57 DC2020-87 |
(To be available after the conference date) [more] |
CPSY2020-57 DC2020-87 pp.43-48 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2021-03-26 16:00 |
Online |
Online |
Implementation of Versatile Tensor Accelarator (VTA) on the Flow-in-Cloud FPGA system Kazuei Hironaka, Kensuke Iizuka, Hideharu Amano (Keio Univ.) CPSY2020-69 DC2020-99 |
[more] |
CPSY2020-69 DC2020-99 pp.115-120 |