Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CAS, NLP |
2021-10-14 15:50 |
Online |
Online |
Implementation of a Generative Adversarial Network as Bitwise Neural Network Takuma Matsuno, Gauthier Lovic (Ariake College) CAS2021-28 NLP2021-26 |
Generative Adversarial Network (GAN) is an artificial intelligence algorithm in which a generative network, which produc... [more] |
CAS2021-28 NLP2021-26 pp.62-67 |
CAS, NLP |
2021-10-14 16:15 |
Online |
Online |
Implementation and evaluation of a FM synthesis circuit using HDLRuby Aito Fukunaga, Gauthier Lovic (NITAC) CAS2021-29 NLP2021-27 |
[more] |
CAS2021-29 NLP2021-27 pp.68-73 |
CAS, ICTSSL |
2021-01-28 17:15 |
Online |
Online |
A Hardware Implementation of Neural Networks using HDLRuby, a Ruby-based Hardware Description Language Ryota Sakai, Yuki Maehara, Lovic Gauthier (NITAC) CAS2020-53 ICTSSL2020-38 |
In the recent years, FPGAs have been attracting attention as neural network accelerators for their superior performance ... [more] |
CAS2020-53 ICTSSL2020-38 pp.79-84 |
CAS, ICTSSL |
2021-01-28 17:35 |
Online |
Online |
Study of a Hardware Implementation of a Long Short-Term Memory with HDLRuby Yuki Maehara, Ryota Sakai, Lovic Gauthier (NITAC) CAS2020-54 ICTSSL2020-39 |
In the recent years, many global companies have attempted to use FPGA for implementing applications in the field of AI s... [more] |
CAS2020-54 ICTSSL2020-39 pp.85-90 |
NS, IN (Joint) |
2020-03-06 13:20 |
Okinawa |
Royal Hotel Okinawa Zanpa-Misaki (Cancelled but technical report was issued) |
A Study on Estimation Method of Highly Congested Links for Improving Performance of Static Flow Allocation Algorithm Manabu Kato, Naoki Matsuo, Kengo Saiki (NIT, Ariake College), Kenji Kawahara (Kyushu Inst. of Tech.) IN2019-133 |
In a static flow allocation for network traffic engineering (TE),it would be important for estimating highly congesting ... [more] |
IN2019-133 pp.327-332 |
CS, CAS |
2020-02-28 13:15 |
Kumamoto |
|
A Study on Circuit Element Value Mismatches and Occupied Area of Poly-phase Circuits Takafumi Yamaji (Sojo Univ.), Akio Shimizu (NIT, Ariake College) CAS2019-120 CS2019-120 |
An effect of the circuit element value error to modulated signal error in polyphase circuits is described. The sensitivi... [more] |
CAS2019-120 CS2019-120 pp.131-136 |
CS, CAS |
2018-03-13 13:40 |
Fukuoka |
Nishijin Plaza, Kyushu University |
A proposal of an analog poly-phase integrator with a complex coefficient Takafumi Yamaji (Sojo Univ.), Akio Shimizu (NIT Ariake College) CAS2017-154 CS2017-108 |
A design method for a poly-phase filter is described. Poly-phase circuits are required for analog signal processing afte... [more] |
CAS2017-154 CS2017-108 pp.119-122 |
NS, IN (Joint) |
2018-03-01 09:40 |
Miyazaki |
Phoenix Seagaia Resort |
A Flow Allocation Algorithm for TE in Scale-Free Networks Manabu Kato (NIT, Ariake College), Kenji Kawahara (Kyutech) IN2017-95 |
We develop a flow allocation algorithm for TE in scale-free networks by considering its structure. And we then evaluate ... [more] |
IN2017-95 pp.33-38 |
ICD, MW |
2016-03-04 14:20 |
Hiroshima |
Hiroshima University |
A Study of the Calibration Circuit Used for Multiple Output Neuron MOS Current Mirror Noriki Nakayama, Takuro Noguchi (Saga Univ), Akio Shimizu (Ariake College), Sumio Fukai (Saga Univ) MW2015-211 ICD2015-134 |
In our laboratory, 14 bit current steering Digital to Analog Converter (DAC) that operates at a low voltage is studied. ... [more] |
MW2015-211 ICD2015-134 pp.211-215 |
CAS |
2012-01-19 15:05 |
Fukuoka |
Kyushu Univ. |
Consideration of FG-MOS inverter shared the Floating Gate for multiple valued logic. Shinpei Sakaguchi, Yuya Wada (Saga Univ.), Akio Shimizu (Ariake technical college), Sumio Fukai (Saga Univ.) CAS2011-96 |
[more] |
CAS2011-96 pp.63-66 |
CAS |
2011-01-25 15:15 |
Kumamoto |
Kumamoto University |
Low-Voltage Current Mirror with Transimpedance Amplifier Akio Shimizu, Sumio Fukai (Saga Univ.), Yohei Ishikawa (ANCC) CAS2010-90 |
We propose a novel current mirror with a transimpedance amplifier that has high accuracy and high output swing.
A feedb... [more] |
CAS2010-90 pp.35-38 |
ET |
2008-07-19 10:55 |
Fukushima |
|
Development of Remote V-I Characteristics Measurement System for Study of Electronic Circuits Design. Takashi Yoshitomi (ANCT), Masashi Ohchi (Chiba Institute of Technology), Shinichi Sasaki, Tatsuya Furukawa (Saga Univ.) ET2008-19 |
[more] |
ET2008-19 pp.13-18 |
AP |
2008-05-15 16:20 |
Nagasaki |
Sasebo national college of technology |
[Special Talk]
Scattering Theory by Spatially Partial-Coherent Waves and its Application Mitsuo Tateiba (ANCT) |
[more] |
|
ICM |
2008-05-09 14:00 |
Kagoshima |
Kagoshima Public Access Center |
Distributed Processing on Immune Algorithm in Job-shop Scheduling Problem Ichiro Iimura (Pref. Univ. of Kumamoto), Yoshifumi Moriyama (Ariake National Coll. of Tech.), Shigeru Nakayama (Kagoshima Univ.) ICM2008-21 |
In this paper, we discuss about the distributed immune algorithm (DIA) and examine its effect. In our experiment using f... [more] |
ICM2008-21 pp.115-120 |
NC |
2006-11-11 15:05 |
Saga |
Saga University |
Research on Four Valued T-Gate with νMOSFETs Yoshikazu Ishimaru, Hiroyasu Kondou (Saga Univ), Yohei Ishikawa (Ariake NCT), Sumio Fukai (Saga Univ) |
[more] |
NC2006-70 pp.47-50 |
EE |
2005-09-09 15:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Electronic Choke Coil for Power Source/Load on Wire Communication System Katsuaki Murata (Sojo Univ.), Kenji Ozawa, Nobuo Hamada (Ariake NCT), Yuusuke Honda (Buntoku High School) |
Coaxial cable and twisted pair cable on wire communication system carry high frequency signals and DC power. Choke coils... [more] |
EE2005-36 pp.25-28 |