Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF, VLD |
2024-01-30 13:20 |
Kanagawa |
AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Reduction of Circuit Size by Optimizing Status Registers in Full Hardware RTOS-Based Systems Kei Mikami, Nagisa Ishiura (Kansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2023-94 RECONF2023-97 |
This article presents a technique for handling increased number of tasks by reducing both circuit size and critical path... [more] |
VLD2023-94 RECONF2023-97 pp.81-86 |
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] |
2022-01-24 10:20 |
Online |
Online |
Full Hardware Implementation of RTOS-Based Systems Using General-Purpose High-Level Synthesizer Takuya Ando, Yugo Ishii, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2021-51 CPSY2021-20 RECONF2021-59 |
This article proposes a method for implementing a whole RTOS-based system as hardware using general-purpose high-level s... [more] |
VLD2021-51 CPSY2021-20 RECONF2021-59 pp.13-18 |
HWS, VLD [detail] |
2021-03-03 14:55 |
Online |
Online |
Aggregating Service Functions in Full Hardware Implementation of RTOS-Based Systems Iori Muguruma, Nagisa Ishiura, Takuya Ando (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2020-75 HWS2020-50 |
This article presents a revised architecture for full-hardware
implementation of RTOS-based systems. In the previous m... [more] |
VLD2020-75 HWS2020-50 pp.38-43 |
HWS, VLD [detail] |
2020-03-05 10:30 |
Okinawa |
Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Motor Current Signature Analysis Based On-Line Fault Detection of DC Motor Naoki Osako (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2019-111 HWS2019-84 |
This article presents a method for online detection of DC motors' fault based on current signature analysis.
While cu... [more] |
VLD2019-111 HWS2019-84 pp.101-106 |
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] |
2020-01-23 11:25 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University |
Full Hardware Synthesis of FreeRTOS-Based Systems Wakako Nakano, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2019-70 CPSY2019-68 RECONF2019-60 |
[more] |
VLD2019-70 CPSY2019-68 RECONF2019-60 pp.105-110 |
HWS, VLD |
2019-03-01 10:00 |
Okinawa |
Okinawa Ken Seinen Kaikan |
Synthesis of Full Hardware Implementation of RTOS-Based Systems Yuuki Oosako, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2018-122 HWS2018-85 |
This paper presents a method of automatically synthesizing a hardware
design from a set of source codes for a real-time... [more] |
VLD2018-122 HWS2018-85 pp.175-180 |
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] |
2018-01-18 17:00 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University |
Distributed Memory Architecture for High-Level Synthesis from Erlang Kagumi Azuma, Shoki Hamana, Hidekazu Wakabayashi, Nagisa Ishiura (Kwansei Gakuin Univ.), Nobuaki Yoshida, Hiroyuki Kanbara (ASTEM) VLD2017-75 CPSY2017-119 RECONF2017-63 |
This paper presents a distributed memory architecture for dedicated
hardware automatically synthesized from Erlang prog... [more] |
VLD2017-75 CPSY2017-119 RECONF2017-63 pp.77-82 |
MI |
2017-09-25 10:30 |
Chiba |
Chiba Univ. |
[Short Paper]
An evaluation on image quality improvement for free breathing Real-time Cine MRI Naoki Tokuyama, Tetsuo Sato (GCHS), Keiko Kou (NAIST), Nobuyasu Ichinose (TMSC), Shigehide Kuhara (Kyorin Univ.), Shigehiko Kanaya (NAIST), Kotaro Minato (ASTEM) MI2017-38 |
In this study, the cardiac phase of an image sequence of real-time Cine-MRI without an electrocardiogram synchronization... [more] |
MI2017-38 pp.3-4 |
VLD |
2016-02-29 15:00 |
Okinawa |
Okinawa Seinen Kaikan |
High-Level Synthesis of Embedded Systems Controller from Erlang Hinata Takabeyashi, Nagisa Ishiura, Kagumi Azuma (Kwansei Gakuin Univ), Nobuaki Yoshida, Hiroyuki Kanbara (ASTEM) VLD2015-114 |
This article presents a method of specifying the behavior of embedded systems' control by a subset of Erlang and synthes... [more] |
VLD2015-114 pp.19-24 |
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] |
2016-01-21 13:50 |
Kanagawa |
Hiyoshi Campus, Keio University |
Binary Synthesis Implementing External Interrupt Handler as Independent Module Naoya Ito, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2015-106 CPSY2015-138 RECONF2015-88 |
[more] |
VLD2015-106 CPSY2015-138 RECONF2015-88 pp.215-220 |
DC, CPSY |
2015-04-17 13:25 |
Tokyo |
|
A study of processor architecture suited for intelligent sensing system Hiroki Hihara, Akira Iwasaki (Univ. of Tokyo), Masanori Hashimoto (Osaka Univ./JST CREST), Hiroyuki Ochi (Rits/JST CREST), Yukio Mitsuyama (KUT/JST CREST), Hidetoshi Onodera (Kyoto Univ./JST CREST), Hiroyuki Kanbara (ASTEM/JST CREST), Kazutoshi Wakabayashi, Takashi Takenaka, Takashi Takenaka, Hiromitsu Hada, Munehiro Tada (NEC/JST CREST) CPSY2015-8 DC2015-8 |
Sensor nodes are now important elements for the system of social infrastructure, and thus intelligent processing capabil... [more] |
CPSY2015-8 DC2015-8 pp.43-48 |
MI |
2015-03-02 13:40 |
Okinawa |
Hotel Miyahira |
Image registration for myocardial perfusion MRI to facilitate examing ischemic patients while breathing Akihiro Manabe, Tetsuo Sato (NAIST), Tomohisa Okada (Kyoto Univ.), Shigehide Kuhara (TMSC), Kaori Togashi (Kyoto Univ.), Shigehiko Kanaya (NAIST), Kotaro Minato (ASTEM) MI2014-79 |
Myocardial Perfusion MRI (Magnetic Resonance Imaging) is one of the useful tools to examine ischemic heart disease. For ... [more] |
MI2014-79 pp.119-124 |
IPSJ-SLDM, CPSY, RECONF, VLD [detail] |
2014-01-29 16:45 |
Kanagawa |
Hiyoshi Campus, Keio University |
Binary Synthesis of Hardware Accelerator Tightly Coupled with CPU Shimpei Tamura, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-133 CPSY2013-104 RECONF2013-87 |
This article presents a method of synthesizing hardware that accelerates specified sections of binary programs. The acce... [more] |
VLD2013-133 CPSY2013-104 RECONF2013-87 pp.185-190 |
MI |
2014-01-27 13:30 |
Okinawa |
Bunka Tenbusu Kan |
Automatic Region of Interest Setting in Magnetic Resonance Coronary Angiography and Selecting Optimal Data Acquisition Window Hisatoshi Ogata, Tetsuo Sato (NAIST), Tomohisa Okada (Kyoto Univ. Hospital), Shigehide Kuhara (TMSC), Kaori Togashi (Kyoto Univ.), Kotaro Minato (ASTEM), Shigehiko Kanaya (NAIST) MI2013-106 |
For an examination of coronary artery of the heart, chest CT is now the mainstream. However, the demand for coronary MRI... [more] |
MI2013-106 pp.269-274 |
MI |
2013-09-13 13:45 |
Chiba |
|
Postacquisition synchronization of nongated confocal image sequences in zebrafish heart Tetsuo Sato, Norio Takada (NAIST), Kotaro Minato (ASTEM) MI2013-42 |
[more] |
MI2013-42 pp.25-30 |
CPSY, VLD, RECONF, IPSJ-SLDM [detail] |
2013-01-16 16:25 |
Kanagawa |
|
Speeding up multiple sections of binary code by hardware accelerator tightly coupled with cpu Shunsuke Satake (Kwansei Gakuin Univ), Nagisa Ishiura, Shimpei Tamura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ), Hiroyuki Kanbara (ASTEM) VLD2012-119 CPSY2012-68 RECONF2012-73 |
This article presents an improvement over the hardware accelerator
tightly coupled with a CPU. While the previously pr... [more] |
VLD2012-119 CPSY2012-68 RECONF2012-73 pp.69-73 |
SS, IPSJ-SE |
2012-11-01 13:15 |
Hiroshima |
Hiroshima City University |
Application of formal methods to network behavior dependent systems Nobuaki Yoshida (ASTEM), Han-Myung Chang, Atsushi Sawada (Nanzan Univ.), Yukihiro Nakamura (ASTEM) SS2012-39 |
In this paper, we study application of formal methods to“mobile systems”, which consist of wireless devices distributed ... [more] |
SS2012-39 pp.35-40 |
VLD, CPSY, RECONF, IPSJ-SLDM [detail] |
2012-01-26 09:00 |
Kanagawa |
Hiyoshi Campus, Keio University |
Merge of Functions in High-Level Synthesis using Assembly Codes as Intermediate Representation Fumiaki Takashima, Nagisa Ishiura, Makoto Orino (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2011-106 CPSY2011-69 RECONF2011-65 |
This article presents a method of merging functions during high-level synthesis whose inputs are assembly codes generate... [more] |
VLD2011-106 CPSY2011-69 RECONF2011-65 pp.89-94 |
VLD, CPSY, RECONF, IPSJ-SLDM [detail] |
2012-01-26 09:25 |
Kanagawa |
Hiyoshi Campus, Keio University |
High-Level Synthesis of Hardware Relinkable to Software Makoto Orino, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Fumiaki Takashima (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2011-107 CPSY2011-70 RECONF2011-66 |
This article presents a method of synthesizing {\em relinkable} hardware for hardware/software codesign utilizing high-l... [more] |
VLD2011-107 CPSY2011-70 RECONF2011-66 pp.95-100 |
MBE |
2011-07-08 17:05 |
Tokushima |
The University of Tokushima |
Improvement of Convergence Speed using Prediction in a Cardiovascular Strong-coupling Simulation Yuki Hasegawa (Kyoto Univ.), Takao Shimayoshi (ASTEM RI/Kyoto), Akira Amano (Ritsumeikan Univ.), Tetsuya Matsuda (Kyoto Univ.) MBE2011-29 |
Detailed simulation analysis of the cardiovascular system is important because the system is a biological phenomenon ind... [more] |
MBE2011-29 pp.47-52 |