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Technical Committee on VLSI Design Technologies (VLD)  (2018 - )

Chair: Noriyuki Minegishi (Mitsubishi Electric) Vice Chair: Nozomu Togawa (Waseda Univ.)
Secretary: Koyo Nitta (NTT), Yukihide Odaira (Aizu Univ.)

[Go to Official VLD Homepage (Japanese)] 
 Schedule  (Sort by: Date Ascending)
 Results 1 - 6 of 6  /   
Date Place Topics Joint Deadline Select Menu
Mon, May 14, 2018
- Tue, May 15
Institute of Industrial Science, University of Tokyo LSI and System Workshop 2018 ICD, CPSY, DC, HWS, IPSJ-SLDM, IPSJ-ARC
(2nd)
[unfixed]
  • Detailed Info.
       (Japanese)
     
  • Wed, May 16, 2018
    Kitakyushu International Conference Center System Design, etc. IPSJ-SLDM [Thu, Mar 15]
  • Detailed Info.
       (Japanese)
  • Regist. Closed
  • Adv. Program 
  • Thu, Jun 14, 2018
    - Fri, Jun 15
    Hokkaido Univ. (Frontier Research in Applied Sciences Build.) System and Signal Processing, etc CAS, SIP, MSS [Sun, Apr 15]
  • Detailed Info.
       (Japanese)
  • Regist. Closed
  • Adv. Program 
  • Wed, Dec 5, 2018
    - Fri, Dec 7
    Satellite Campus Hiroshima Design Gaia 2018 -New Field of VLSI Design- VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
    (Joint) [detail]
    [Mon, Oct 8]
  • Detailed Info.
       (Japanese)
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
  • Wed, Jan 30, 2019
    - Thu, Jan 31 (tentative)
    Raiosha, Hiyoshi Campus, Keio University FPGA Applications, etc. IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] [Fri, Nov 16]
  • Detailed Info.
  • Registration
       for presentation
  • Registration Fee 
  • Wed, Feb 27, 2019
    - Sat, Mar 2 (tentative)
    Okinawa Ken Seinen Kaikan Design Technology for System-on-Silicon, Hardware Security, etc. HWS [unfixed]
  • Registration Fee 
  •  Results 1 - 6 of 6  /   


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