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Technical Committee on VLSI Design Technologies (VLD)  (2017 - )

Chair: Hiroyuki Ochi (Ritsumeikan Univ.) Vice Chair: Noriyuki Minegishi (Mitsubishi Electric)
Secretary: Shinobu Nagayama (Hiroshima City Univ.), Koyo Nitta (NTT)

[Go to Official VLD Homepage] 
 Schedule  (Sort by: Date Ascending)
 Results 1 - 4 of 4  /   
Date Place Topics Joint Deadline Select Menu
Wed, May 10, 2017
Kitakyushu International Conference Center System Design, etc. IPSJ-SLDM [Wed, Mar 15]
  • Detailed Info.
       (Japanese)
  • Regist. Closed
  • Adv. Program 
  • Mon, May 15, 2017
    - Tue, May 16
    Institute of Industrial Science, University of Tokyo LSI and System Workshop 2017 ICD, CPSY, DC, IPSJ-SLDM, IPSJ-ARC
    (2nd)
    [unfixed]
  • Detailed Info.
       (Japanese)
  • Regist. Waiting 
  • Mon, Jun 19, 2017
    - Tue, Jun 20
    新潟市西区五十嵐2の町8050   SIP, CAS, MSS [Thu, Apr 13]
  • Regist. Closed
  • Adv. Program 
  • Mon, Nov 6, 2017
    - Wed, Nov 8
    Kumamoto-Kenminkouryukan Parea Design Gaia 2017 -New Field of VLSI Design- VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
    (Joint) [detail]
    [Mon, Sep 11]
  • Detailed Info.
       (Japanese)
  • Regist. Closed
  • Adv. Program 
  •  Results 1 - 4 of 4  /   


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