IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
... (for ESS/CS/ES/ISS)
Tech. Rep. Archives
... (for ES/CS)
 Go Top  Go Back   Prev VLD Conf / Next VLD Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 

Technical Committee on VLSI Design Technologies (VLD) [schedule] [select]
Chair Yusuke Matsunaga (Kyushu Univ.)
Vice Chair Takashi Takenana (NEC)
Secretary Hiroyuki Tomiyama (Ritsumeikan Univ.), Daisuke Fukuda (Fujitsu Labs.)
Assistant Ittetsu Taniguchi (Ritsumeikan Univ.)

Technical Committee on Circuits and Systems (CAS) [schedule] [select]
Chair Satoshi Tanaka (Murata)
Vice Chair Toshihiko Takahashi (Niigata Univ.)
Secretary Taizou Yamawaki (Hitachi), Shunsuke Koshita (Tohoku Univ.)
Assistant Toshihiro Tachibana (Shonan Inst. of Tech.), Yohei Nakamura (Hitachi)

Technical Committee on Signal Processing (SIP) [schedule] [select]
Chair Osamu Houshuyama (NEC)
Vice Chair Makoto Nakashizuka (Chiba Inst. of Tech.), Masahiro Okuda (Univ. of Kitakyushu)
Secretary Masanori Tsujikawa (NEC), Akira Hirabayashi (Ritsumeikan Univ.)
Assistant Takamichi Miyata (Chiba Inst. of Tech.)

Technical Committee on Mathematical Systems Science and its applications (MSS) [schedule] [select]
Chair Satoshi Yamane (Kanazawa Univ.)
Vice Chair Morikazu Nakamura (Univ. of Ryukyus)
Secretary Mitsuru Nakata (Yamaguchi Univ.), Ichiro Toyoshima (Toshiba)
Assistant Hideki Kinjo (Okinawa Univ.)

Conference Date Wed, Jun 17, 2015 09:20 - 17:50
Thu, Jun 18, 2015 09:20 - 12:25
Topics System, signal processing and related topics 
Conference Place  
Associate Prof. Kazuya HARAGUCHI
Sponsors This conference is co-sponsored by IEEE Signal Processing Society Japan Chapter. This conference is technical co-sponsored by IEEE Circuits and Systems Society Japan Chapter(IEEE CASS JC).

Wed, Jun 17 AM 
09:20 - 10:35
(1) 09:20-09:45 Design of Probabilistic Boolean Networks Based on Network Structure and Steady-state Probabilities Koichi Kobayashi (Hokkaido Univ.), Kunihiko Hiraishi (JAIST)
(2) 09:45-10:10 Choreography Realization by Re-constructible Decomposition of Acyclic Relations Toshiyuki Miyamoto (Osaka Univ.)
(3) 10:10-10:35 Stability of Matching on Stable Matching Problem with Multicriteria Preference List Hideki Kinjo (Okinawa Univ.), Morikazu Nakamura (Univ. of the Ryukyus)
  10:35-10:45 Break ( 10 min. )
Wed, Jun 17 AM 
10:45 - 12:00
(4) 10:45-11:10 Extension of One-Instruction-Set Computer and Its Evaluation Noriaki Sakamoto, Tanvir Ahmed (Tokyo Tech), Jason H. Anderson (Univ. of Toronto), Yuko Hara-Azumi (Tokyo Tech)
(5) 11:10-11:35 Accelerating techniques for test pattern compaction for large circuits Yusuke Matsunaga (Kyushu Univ.)
(6) 11:35-12:00 A Case Study of Symbolic Model Checking of Large Scale Hardware IP Yuta Morimitsu, Tomoyuki Yokogawa (Okayama Pref. Univ.), Masafumi Kondo, Hisashi Miyazaki (Kawasaki Univ. of Medical Welfare), Yoichiro Sato, Kazutami Arimoto (Okayama Pref. Univ.)
  12:00-13:20 Lunch Break ( 80 min. )
Wed, Jun 17 PM 
13:20 - 15:00
(7) 13:20-13:45 On the Complexity of Mining Maximal Frequent Subgraphs Satoshi Tayu, Shuni Go, Shuichi Ueno (Tokyo Tech)
(8) 13:45-14:10 The characteristic of routes selected by degree centrality-aware distance vector routing Yoshihiro Kaneko (Gifu Univ.)
(9) 14:10-14:35 The difference in profit allocation of participants in deregulated electricity markets Ryo Hase, Norihiko Shinomiya (Soka Univ.)
(10) 14:35-15:00 Constrained vector fitting and its application to filter characteristics approximation Toshiki Matsubara, Toshikazu Sekine, Yasuhiro Takahashi (Gifu Univ.)
  15:00-15:15 Break ( 15 min. )
Wed, Jun 17 PM 
15:15 - 16:05
(11) 15:15-16:05 [Invited Lecture]
A consideration on a pseudo-positive real function
Tetsuo Nishi (Kyushu Univ.)
  16:05-16:20 Break ( 15 min. )
Wed, Jun 17 PM 
16:20 - 17:50
(12) 16:20-17:50 [Panel Discussion]
The Role of System and Signal Processing Subsociety
-- Society Activity and Job Search --
Atsushi Takahashi (Tokyo Tech), Yoshihiro Kaneko (Gifu Univ.), Yusuke Matsunaga (Kyushu Univ.), Osamu Hoshuyama, Yuichi Nakamura (NEC)
Thu, Jun 18 AM 
09:20 - 10:35
(13) 09:20-09:45 Stabilization of Nonequilibrium Target State in Population Games Using Capitation Tax and Subsidy Masaya Kinoshita, Takafumi Kanazawa (Osaka Univ.)
(14) 09:45-10:10 Multipopulation Game Dynamics Generated by Population-Independent Pairwise Proportional Imitation Manao Machida, Takafumi Kanazawa (Osaka Univ.)
(15) 10:10-10:35 Software model checking of embedded assembly programs by symbolic execution Ryosuke Konoshita, Satoshi Yamane (Kanazawa Univ.)
  10:35-10:45 Break ( 10 min. )
Thu, Jun 18 AM 
10:45 - 12:25
(16) 10:45-11:10 Multi-channel Feedforward ANC System Using Microphone Arrays for Noise Source Separation Satoshi Kinoshita, Yoshinobu Kajikawa (Kansai Univ.)
(17) 11:10-11:35 Non-Frequency-Overlapping Dual-Sweep Waveform for De-Ramp Processing in FM Continuous Wave Radar Osamu Hoshuyama, Minoru Kobayashi, Masafumi Emura (NEC)
(18) 11:35-12:00 A design method of the Low Delay Band-Pass Maximally Flat FIR Digital Differentiators Takashi Yoshida, Naoyuki Aikawa (Tokyo Univ. of Science)
(19) 12:00-12:25 Compensation of Nonlinear Distortions for Parametric Array Loudspeakers
-- In the case of changing the amplitude of input signal --
Yuta Hatano, Satoshi Kinoshita, Chuang Shi, Yoshinobu Kajikawa (Kansai Univ.)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 40 minutes for presentation and 10 minutes for discussion.

Contact Address and Latest Schedule Information
VLD Technical Committee on VLSI Design Technologies (VLD)   [Latest Schedule]
Contact Address Hiroyuki Tomiyama (Ritsumeikan University)
E-: htfci
Tel: 077-561-4928 
Announcement See also VLD's homepage:
CAS Technical Committee on Circuits and Systems (CAS)   [Latest Schedule]
Contact Address Norihiko Shinomiya (Soka University)
TEL: 042-691-9400
SIP Technical Committee on Signal Processing (SIP)   [Latest Schedule]
Contact Address Masanori Tsujikawa (NEC Corp.)
E: tucbc 
MSS Technical Committee on Mathematical Systems Science and its applications (MSS)   [Latest Schedule]
Contact Address Mitsuru Nakata (Yamaguchi Univ.)
Tel: +81-83-933-5402
E-: mgu-u 

Last modified: 2015-06-16 09:25:02

Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.

[On-Site Price List of Proceedings (Technical Report)] (in Japanese)
[Presentation and Participation FAQ] (in Japanese)
[Cover and Index of IEICE Technical Report by Issue]

[Return to CAS Schedule Page]   /   [Return to VLD Schedule Page]   /   [Return to SIP Schedule Page]   /   [Return to MSS Schedule Page]   /  
 Go Top  Go Back   Prev VLD Conf / Next VLD Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan