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| Paper Abstract and Keywords | ||
| Presentation | 2015-06-18 10:10 Software model checking of embedded assembly programs by symbolic execution Ryosuke Konoshita, Satoshi Yamane (Kanazawa Univ.)  CAS2015-15 VLD2015-22 SIP2015-46 MSS2015-15 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We have developed a software verification system for embedded assembly programs. It dynamically generates a model by the symbolic execution, and verifies the model by a reachability analysis. Our verification system verifies a model bigger than a conventional verification system for embedded systems. We explain a method which applies the symbolic execution to assembly programs. Finally, we show verification properties through some experiments. In addition, we show that our verification system can verify larger models. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | embedded assembly program / software model checking / symbolic execution / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 115, no. 90, MSS2015-15, pp. 77-81, June 2015. | |
| Paper # | MSS2015-15 | |
| Date of Issue | 2015-06-10 (CAS, VLD, SIP, MSS) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CAS2015-15 VLD2015-22 SIP2015-46 MSS2015-15 |
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| Conference Information | |
| Committee | MSS CAS SIP VLD |
| Conference Date | 2015-06-17 - 2015-06-18 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Otaru University of Commerce |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | System, signal processing and related topics |
| Paper Information | |
| Registration To | MSS |
| Conference Code | 2015-06-MSS-CAS-SIP-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Software model checking of embedded assembly programs by symbolic execution |
| Sub Title (in English) | |
| Keyword(1) | embedded assembly program |
| Keyword(2) | software model checking |
| Keyword(3) | symbolic execution |
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| 1st Author's Name | Ryosuke Konoshita |
| 1st Author's Affiliation | Kanazawa Uuniversity (Kanazawa Univ.) |
| 2nd Author's Name | Satoshi Yamane |
| 2nd Author's Affiliation | Kanazawa Uuniversity (Kanazawa Univ.) |
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| Speaker | Author-2 |
| Date Time | 2015-06-18 10:10:00 |
| Presentation Time | 25 minutes |
| Registration for | MSS |
| Paper # | CAS2015-15, VLD2015-22, SIP2015-46, MSS2015-15 |
| Volume (vol) | vol.115 |
| Number (no) | no.87(CAS), no.88(VLD), no.89(SIP), no.90(MSS) |
| Page | pp.77-81 |
| #Pages | 5 |
| Date of Issue | 2015-06-10 (CAS, VLD, SIP, MSS) |
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