| Paper Abstract and Keywords |
| Presentation |
2012-04-10 13:50
The Automatic Code Optimization for High-Level Synthesis
Mao Hatto, Takaaki Miyajima, Hideharu Amano (Keio Univ.) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
FPGA (Field Programmable Gate Array) has been applied to recent studies and products in high performance computation systems, such as medical and financial systems. However, to design these systems, we need to use HDL (Hardware Design Language). This description language is sometimes difficult to use for software engineers who do not have experience and knowledge of hardware design.
Solving these issues, the High-level Synthesis Language, which generates HDL from C-based language automatically, has gathered attention recently. High-level synthesis language provides easy implementation environment for users. Nevertheless, users are still needed some experience and knowledge for hardware design to create proper HDL.
To resolve this issue of high-level synthesis, this research proposes an automatic code modification tool for High-Level Synthesis. This tool focuses on loop optimization, which has high probability of improve processing time.
For evaluations, we chose four applications. As the result, it achieves up to 66.0% speed up, and 52.3% speed up on average. Furthermore, it shows tendency of optimization to the user. It means that users are able to chose the optimization ways even they do not have knowledge or experience of hardware implementation. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
High-Level Synthsis Language / Code modification / FPGAs / CyberWorkBench / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 112, no. 2, CPSY2012-3, pp. 13-18, April 2012. |
| Paper # |
CPSY2012-3, DC2012-3 |
| Date of Issue |
2012-04-03 (CPSY, DC) |
| Conference Information |
| Committee |
CPSY DC |
| Conference Date |
2012-04-10 - 2012-04-10 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
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| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
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| Paper Information |
| Registration To |
CPSY |
| Conference Code |
2012-04-CPSY-DC |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
The Automatic Code Optimization for High-Level Synthesis |
| Sub Title (in English) |
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| Keyword(1) |
High-Level Synthsis Language |
| Keyword(2) |
Code modification |
| Keyword(3) |
FPGAs |
| Keyword(4) |
CyberWorkBench |
| Keyword(5) |
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| Keyword(6) |
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| 1st Author's Name |
Mao Hatto |
| 1st Author's Affiliation |
Keio University (Keio Univ.) |
| 2nd Author's Name |
Takaaki Miyajima |
| 2nd Author's Affiliation |
Keio University (Keio Univ.) |
| 3rd Author's Name |
Hideharu Amano |
| 3rd Author's Affiliation |
Keio University (Keio Univ.) |
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| Speaker |
1 |
| Date Time |
2012-04-10 13:50:00 |
| Presentation Time |
25 |
| Registration for |
CPSY |
| Paper # |
IEICE-CPSY2012-3,IEICE-DC2012-3 |
| Volume (vol) |
IEICE-112 |
| Number (no) |
no.2(CPSY), no.3(DC) |
| Page |
pp.13-18 |
| #Pages |
IEICE-6 |
| Date of Issue |
IEICE-CPSY-2012-04-03,IEICE-DC-2012-04-03 |
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