南谷　崇

1. T.Nanya and Y.Tohma,
   "Universal multicode STT state assignments for asynchronous sequential machines,"
   IEEE Trans. on Computers,Vol.C-28, No.11,pp.811-818 (Nov. 1979).
   
   

2. T.Nanya and T.Kawamura,
   "Error secure/propagating concept and its application to the design of strongly fault secure processors,"
   IEEE Trans. on Computers, Vol.37, No.1, pp.14-24 (Jan. 1988).
   
   

3. T. Nanya, Y. Ueno, H. Kagotani, M. Kuwako, A. Takamura:
   "TITAC: Design of a Quasi-Delay-Insensitive Microprocessor",
   IEEE Design & Test of Computers, Vol.11, No.2, pp.50-63
   (Summer 1994).