Special Issue on Low-Voltage, Low-Power Integrated Circuits
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 . FOREWORD ........................................................ 333
        Katsuhiro SHIMOHIGASHI

INVITED PAPERS
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 . Overview of Low-Power ULSI Circuit Techniques ................... 334
        Tadahiro KURODA and Takayasu SAKURAI

 . Trends in Secondary Batteries for Portable Electronic Equipment . 345
        Kazunobu MATSUMOTO and Akira KAWAKAMI

PAPERS
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[Device Technology]

 . High-Speed High-Density Self-Aligned PNP Technology for Low-Power
   Complementary Bipolar ULSIs ..................................... 353
        Katsuyoshi WASHIO, Hiromi Shimamoto and Tohru NAKAMURA

 . High-Speed and Low-Power n+-p+ Double-Gate SOI CMOS ............. 360
        Kunihiro SUZUKI, Tetsu TANAKA, Yoshiharu TOSAKA, Hiroshi HORIE
        and Toshihiro SUGII

 . Monolithic Integration of Resonant Tunneling Diode and HEMT for
   Low-Voltage, Low-power Digital Circuits ......................... 368
        Yuu WATANABE, Yasuhiro NAKASHA, Kenji IMANISHI and Masahiko
        TAKIKAWA

[Digital Circuits]

 . A New Emitter-Follower Circuit for High-Speed and Low-Power ECL . 374
        Nagisa SASAKI, Hisayasu SATO, Kimio UEDA, Koichiro MASHIKO and
        Hiroshi SHIBATA

 . A 1.5-V 250-MHz to 3.0-V 622-MHz Operation CMOS Phase-Locked Loop
   with Precharge Type Phase-Frequency Detector .................... 381
        Harufusa KONDOH, Hiromi NOTANI, Tsutomu YOSHIMURA, Hiroshi
        SHIBATA and Yoshio MATSUDA

 . A 0.9-V, 2.5 MHz CMOS 32-bit Microprocessor ..................... 389
        Hiroaki SUZUKI, Toshichika SAKAI, Hisao HARIGAI and Yoichi YANO

 . A Low Power Bus Architecture with Local and Global Charge-Recycling
   Bus Techniques for Battery-Operated Ultra-High Data Rate ULSI's . 394
        Hiroyuki YAMAUCHI, Hironori AKAMATSU and Tsutomu FUJITA

 . Dynamic Terminations for Low-Power High-Speed Chip Interconnection
   in Portable Equipment ........................................... 404
        Takayuki KAWAHARA, Masakazu AOKI and Katsutaka KIMURA

[Analog Circuits]

 . Low-Voltage Analog Circuit Design Techniques: A Review .......... 414
        Kazuo KATO

 . A Monolithic GaAs Linear Power Amplifier Operating with a Single Low
   2.7-V Supply for 1.9-GHz Digital Mobile Communication Applications
            ........................................................ 424
        Masami NAGAOKA, Tomotoshi INOUE, Katsue KAWAKYU, Shuichi
        OBAYASHI, Hiroyuki KAYANO, Eiji TAKAGI, Yoshikazu TANABE,
        Misao YOSHIMURA, Kenji ISHIDA, Yoshiaki KITAURA and Naotaka
        UCHITOMI

 . Low-Power Technology for GaAs Front-End ICs ..................... 430
        Tadayoshi NAKATSUKA, Junji ITOH, Kazuaki TAKAHASHI, Hiroyuki
        SAKAI, Makoto TAKEMOTO, Shinji YAMAMOTO, Kazuhisa FUJIMOTO,
        Morikazu SAGAWA and Osamu ISHIKAWA

[DA/Architecture]

 . A Method for Reducing Power Consumption of CMOS Logic Based on
   Signal Transition Probability ................................... 436
        Kunihiro ASADA and Junichi AKITA

 . Synergistic Power/Area Optimization with Transistor Sizing and Wire
   Length Minimization ............................................. 441
        Masaaki YAMADA, Sachiko KUROSAWA, Reiko NOJIMA, Naohito KOJIMA,
        Takashi MITSUHASHI and Nobuyuki GOTO

Regular Section
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PAPERS
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[Opto-Electronics]

 . A Nixed Photonic/Electronic Circuit Simulation Including Transient
   Noise Sources ................................................... 447
        Eiichi SANO and Mikio YONEYAMA

[Electromagnetic Theory]

 . Enhanced Two-Level Optical Resonance in Spherical Microcavities . 454
        Kazuya HAYATA, Tsutomu KOSHIDA and Masanori KOSHIBA

 . ABSTRACTS (IEICE Trans., Vol.J78-C-I, J78-C-II, No.4 in Japanese)
            ........................................................ 462